To correctly
bias the fet, the gate needs to be negative with respect to the source.
Bias is obtained in the following manner. Drain current
flows through the source resistor and develops a voltage across it, making
the emitter positive with respect the zero volts rail.
When a signal voltage is applied to the gate, it controls the drain current. When the signal
goes more negative (less positive) the drain current is reduced and the
voltage across the drain resistor is less.
When the signal
goes less negative (more positive) the drain current is increased and the
voltage across the drain resistor is more.
In both cases the drain voltage does the opposite of the gate voltage. |